Разработка вычислителя для плавающей точки для нейронных сетей

Bibliographic Details
Parent link:Информационные технологии в науке, управлении, социальной сфере и медицине: сборник научных трудов III Международной научной конференции, 23-26 мая 2016 г., Томск.— , 2016
Ч. 1.— 2016.— [С. 162-164]
Main Author: Зоев И. В. Иван Владимирович
Corporate Author: Национальный исследовательский Томский политехнический университет (ТПУ) Институт кибернетики (ИК) Кафедра вычислительной техники (ВТ)
Summary:Заглавие с титульного экрана
This article covers the most frequently performed operations on floating-point numbers in artificial neural networks. Also was submitted a selection of the optimum value of the bit to 14-bit float ing-point numbers for implementation on FPGAs, based on the modern architecture of data types of integrated circuits. Presented the description of the algorithm of multiplication (multiplier) of the floating-point numbers. In addition, in this article were described features of the addition (adder) and subtraction (subtractor) operation implementations. Furthermore, was presented operations for such a variety of neural networks as a convolution network - mathematical comparison of floating point ("less than" and "greater than or equal"). In conclusion, presents the substantiation of why this article is excluded consideration dividing operations in computing of neural network.
Language:Russian
Published: 2016
Series:Информационные системы и технологии
Subjects:
Online Access:http://earchive.tpu.ru/handle/11683/31548
Format: Electronic Book Chapter
KOHA link:https://koha.lib.tpu.ru/cgi-bin/koha/opac-detail.pl?biblionumber=619349