On using ABC for deriving distinguishing sequences for Verilog-descriptions
| Parent link: | East-West Design and Test Symposium (EWDTS), 2015 IEEE.— 2016.— [4 р.] |
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| Autor corporatiu: | |
| Altres autors: | , , , |
| Sumari: | Title screen In this paper, we discuss how a software ABC can be effectively used to derive distinguishing sequences for Verilog-descriptions. A set of these sequences can serve as a test suite for a digital device that is designed based on the corresponding Verilog-description using the FPGA technology. The paper contains a methodology for such test derivation technique, as well as technical details about the use of the tool and necessary commands. ABC can be easily downloaded from its official web site, and an interested reader can always repeat these experiments or apply this technology for more serious industrial need. Режим доступа: по договору с организацией-держателем ресурса |
| Idioma: | anglès |
| Publicat: |
2016
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| Matèries: | |
| Accés en línia: | http://dx.doi.org/10.1109/EWDTS.2015.7493150 |
| Format: | Electrònic Llibre |
| KOHA link: | https://koha.lib.tpu.ru/cgi-bin/koha/opac-detail.pl?biblionumber=651219 |
| Sumari: | Title screen In this paper, we discuss how a software ABC can be effectively used to derive distinguishing sequences for Verilog-descriptions. A set of these sequences can serve as a test suite for a digital device that is designed based on the corresponding Verilog-description using the FPGA technology. The paper contains a methodology for such test derivation technique, as well as technical details about the use of the tool and necessary commands. ABC can be easily downloaded from its official web site, and an interested reader can always repeat these experiments or apply this technology for more serious industrial need. Режим доступа: по договору с организацией-держателем ресурса |
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| DOI: | 10.1109/EWDTS.2015.7493150 |