Novel Architecture for High Speed and High Fidelity Readout of a Quantum Annealing Processor

Dades bibliogràfiques
Parent link:Bulletin of the American Physical Society.— , 2014
Vol. 59, № 1.— 2014.— Abstract: D35.00012
Altres autors: Fabio Altomare, Andrew J. Berkley, Richard Harris, Emile M. Hoskinson, Mark W. Johnson, Trevor M. Lanting, Uchaykin (Uchaikin) S. V. Sergey Victorovich, Jed D. Whittaker, Paul Bunyk, Elena Tolkacheva, Ilya Perminov
Sumari:Hysteretic dc SQUIDs provide an easy method to read the state of hundreds of qubits\footnote{Supercond. Sci. Technol. \textbf{23}, 105014 (2010)}. However, this approach becomes impractical for circuits with an even larger number of qubits due to heating when dc SQUIDs switch, the relatively slow retrapping dynamics of high quality devices, and suboptimal scaling of the number of control lines with increasing numbers of qubits. The D-Wave Two processor uses an architecture that addresses all three of these issues. This new architecture makes use of Quantum Flux Parametron based shift registers that transfer the classical information produced as the output of the quantum annealing algorithm to a small number of fast non-dissipative and high fidelity microwave readout devices. We will provide an introduction to our implementation, and present data pertaining to readout performance from a 512-qubit quantum annealing processor.
В фонде НТБ ТПУ отсутствует
Idioma:anglès
Publicat: 2014
Matèries:
Format: Capítol de llibre
KOHA link:https://koha.lib.tpu.ru/cgi-bin/koha/opac-detail.pl?biblionumber=600817

MARC

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200 1 |a Novel Architecture for High Speed and High Fidelity Readout of a Quantum Annealing Processor  |f Fabio Altomare [et al.] 
330 |a Hysteretic dc SQUIDs provide an easy method to read the state of hundreds of qubits\footnote{Supercond. Sci. Technol. \textbf{23}, 105014 (2010)}. However, this approach becomes impractical for circuits with an even larger number of qubits due to heating when dc SQUIDs switch, the relatively slow retrapping dynamics of high quality devices, and suboptimal scaling of the number of control lines with increasing numbers of qubits. The D-Wave Two processor uses an architecture that addresses all three of these issues. This new architecture makes use of Quantum Flux Parametron based shift registers that transfer the classical information produced as the output of the quantum annealing algorithm to a small number of fast non-dissipative and high fidelity microwave readout devices. We will provide an introduction to our implementation, and present data pertaining to readout performance from a 512-qubit quantum annealing processor. 
333 |a В фонде НТБ ТПУ отсутствует 
461 |t Bulletin of the American Physical Society  |d 2014 
463 |t Vol. 59, № 1  |o APS March Meeting 2014, March 3–7, 2014, Denver, Colorado  |v Abstract: D35.00012  |d 2014 
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701 0 |a Fabio Altomare 
701 0 |a Andrew J. Berkley 
701 0 |a Richard Harris 
701 0 |a Emile M. Hoskinson 
701 0 |a Mark W. Johnson 
701 0 |a Trevor M. Lanting 
701 1 |a Uchaykin (Uchaikin)  |b S. V.  |c specialist in the field of non-destructive testing  |c Engineer of Tomsk Polytechnic University, Doctor of physical and mathematical sciences  |f 1963-  |g Sergey Victorovich  |3 (RuTPU)RU\TPU\pers\32279 
701 0 |a Jed D. Whittaker 
701 0 |a Paul Bunyk 
701 0 |a Elena Tolkacheva 
701 0 |a Ilya Perminov 
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801 2 |a RU  |b 63413507  |c 20140714  |g RCR 
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